6.5L: LateNews Paper: The Enhanced Reduced Voltage Differential Signaling eRVDS Interface with Clock Embedded Scheme for ChipOnGlass TFTLCD Applications

The enhanced Reduced Voltage Differential Signaling eRVDS is a new intrapanel interface with clock embedded scheme for ChipOnGlass TFTLCD panel. The source driver IC with eRVDS interface operates at higher data rate up to 720Mbps, lower power consumption, and lower EMI and reduces signal line to one...

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Veröffentlicht in:	SID International Symposium Digest of technical papers 2010-05, Vol.41 (1), p.70-73
Hauptverfasser:	Baek, Dong Hoon, Lim, Jung Pil, Pae, Han Su, Lee, Jae Youl, Yu, Wang, Choi, Young Min, Lee, Young Hun, Lee, Sun Ik, Lee, Woo Sung, Lee, Dae Joon, Choi, Yoon Kyung, Lee, Myung Hee
Format:	Artikel
Sprache:	eng
Online-Zugang:	Volltext
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Beschreibung
Zusammenfassung:	The enhanced Reduced Voltage Differential Signaling eRVDS is a new intrapanel interface with clock embedded scheme for ChipOnGlass TFTLCD panel. The source driver IC with eRVDS interface operates at higher data rate up to 720Mbps, lower power consumption, and lower EMI and reduces signal line to one third compared to conventional pointtopoint COG interface.
ISSN:	0097-966X 2168-0159
DOI:	10.1889/1.3500567