P-2: A Novel Self-Aligned SiGe Elevated S/D polycrystalline-Silicon Thin-Film Transistor
A novel self‐aligned SiGe elevated source and drain (S/D) poly‐Si thin film transistor (poly‐Si TFT) was fabricated. The elevated source and drain regions were selectively grown by ultra‐high vacuum chemical vapor deposition (UHVCVD) at 550°C. The resultant transistor has a thin channel region and a...
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Veröffentlicht in: | SID International Symposium Digest of technical papers 2002-05, Vol.33 (1), p.204-207 |
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Hauptverfasser: | , , , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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