P-2: A Novel Self-Aligned SiGe Elevated S/D polycrystalline-Silicon Thin-Film Transistor

A novel self‐aligned SiGe elevated source and drain (S/D) poly‐Si thin film transistor (poly‐Si TFT) was fabricated. The elevated source and drain regions were selectively grown by ultra‐high vacuum chemical vapor deposition (UHVCVD) at 550°C. The resultant transistor has a thin channel region and a self‐aligned thick S/D region, which leads to better performance. With this structure, the turn‐on current in the I‐V characteristics increases dramatically and the drain breakdown voltage is increased as well, compared with conventional thin‐channel poly‐Si TFTs.