On-Chip In-Place Measurements of Vth and Signal/Substrate Response of Differential Pair Transistors

In-place AC measurements of the signal gain and substrate sensitivity of differential pair transistors of an analog amplifier are combined with DC characterization of the threshold voltage (Vth) of the same transistors. An on-chip continuous time waveform monitoring technique enables in-place matrix...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEICE Transactions on Electronics 2012/01/01, Vol.E95.C(1), pp.137-145
Hauptverfasser: BANDO, Yoji, TAKAYA, Satoshi, OHKAWA, Toru, TAKARAMOTO, Toshiharu, YAMADA, Toshio, SOUDA, Masaaki, KUMASHIRO, Shigetaka, MOGAMI, Tohru, NAGATA, Makoto
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:In-place AC measurements of the signal gain and substrate sensitivity of differential pair transistors of an analog amplifier are combined with DC characterization of the threshold voltage (Vth) of the same transistors. An on-chip continuous time waveform monitoring technique enables in-place matrix measurements of differential pair transistors with a variety of channel sizes and geometry, allowing the wide coverage of experiments about the transistor-level physical layout dependency of substrate noise response. A prototype test structure uses a 90-nm CMOS technology and demonstrates the geometry-dependent variation of substrate sensitivity of transistors in operation.
ISSN:0916-8524
1745-1353
DOI:10.1587/transele.E95.C.137