An Implementation of the One-Chip PLL/PWM Motor Control System

An Implementation of the One-Chip PLL/PWM Motor Control System

A PLL/PWM motor speed control system, implementing a type of loop filter for PLL, utilizing counters, multiplexer and a comparetor as operation elements for PWM signals, As a result, it can be implemented as a one-chip IC featuring a low gate count. In this paper, considering time resolution of inte...

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Veröffentlicht in:Denki Gakkai ronbunshi. C, Erekutoronikusu, joho kogaku, shisutemu Information and Systems, 2002/12/01, Vol.122(12), pp.2144-2148
Hauptverfasser: Machida, Hidekazu, Kobayashi, Fuminoro
Format: Artikel
Sprache:eng
Schlagworte:
FPGA
motor speed control
PLL
PWM
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Zusammenfassung:A PLL/PWM motor speed control system, implementing a type of loop filter for PLL, utilizing counters, multiplexer and a comparetor as operation elements for PWM signals, As a result, it can be implemented as a one-chip IC featuring a low gate count. In this paper, considering time resolution of integral operation, an improved circuit for removing steady phase error is proposed.
ISSN:0385-4221
1348-8155
DOI:10.1541/ieejeiss1987.122.12_2144