Speeding up and Modularizing the Ultra-high Precision Integer Multiplier

With the expectancy of higher performance of digital systems, the multiplier with both higher speed and higher precision is required as a key factor of the system improvement. On the other hand, it is quite common that these digital parts are assembled as a system LSI, and in this case, it is essential that these parts are re-usable as a core. The answer to this requirement is modularizing, which can cope with the variable precision, not a fixed one, as a multiplier structure. The structure proposed here can perform a multiplication by cascading necessary number of the same modules and by repeated usage of the modules with necessary clock cycles. By this method, much higher speeding up compared to the conventional sequential type, as much as limitless multiplication precision compared to the parallel type, can be obtained.