Boundary Element Analysis of Steady-State Heat Conduction and Thermal Stresses in the LSI Package

Parametric study on the thermal deformation and the thermal stress of a resin molded package LSI has been performed by the boundary element analysis code, specially developed for this study. The length and the position of the Si chip in the LSI package are employed as the parameters in this study. Boundary element analysis of heat conduction and thermal stresses in a steady-state is carried out under the uniform temperature condition and the heat-generating condition with the heated chip. It is found that the position to minimize the package deformation is located just below the center of the package, however the stress concentration near the Si chip corner becomes nearly maximum on that position of the chip under both conditions. In the heated chip case, both the thermal stress near the chip corner and the package deformation increase as the chip length becomes large.