Implementação e Avaliação de Co-Processadores para BlackScholes em FPGA
Option pricing is one of the main topics of the financial market. There are different models to perform this calculation, however BlackScholes is one of the most used nowadays. Due to this, the implementation of this algorithm shows an interesting study case for optimization. FPGAs (\textit{Field Pr...
Gespeichert in:
Veröffentlicht in: | Cadernos do IME - Série Informática 2020-02, Vol.42, p.7 |
---|---|
1. Verfasser: | |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Option pricing is one of the main topics of the financial market. There are different models to perform this calculation, however BlackScholes is one of the most used nowadays. Due to this, the implementation of this algorithm shows an interesting study case for optimization. FPGAs (\textit{Field Programmable Gate Array}) are boards commonly used in high perfomance computing, with promising results in several cases. Therefore, the main objective of this paper is to implement the Black Scholes formula in FPGA and evaluate its efficiency, using HLS (\textit{High level synthesis}) and running in a Pynq-Z1 board. The results were compared with an execution in python on the ARM present on the board. The obtained results show an unexpected performance, and somes of possible explanations to this fact. |
---|---|
ISSN: | 1413-9014 2317-2193 |
DOI: | 10.12957/cadinf.2019.48269 |