Memory Maps: Reading Rram Devices without DC Power Consumption

According to the 2014 International Technology Roadmap for Semiconductors (ITRS), resistive switching memories (RRAM) are well candidate for next generation nonvolatile memory. Their main properties are fast switching speed, good reliability, low power consumption and CMOS technology compatibility [1, 2], as well as potential scalability beyond NAND flash [3, 4]. They are based on the change in the physical properties of a conductive filament by applying an electric field across a metal-insulator-metal (MIM) or metal-insulator-semiconductor (MIS) structure. A set switching closes the filament and induces a transition from the high-resistance state (HRS) to the low-resistance state (LRS). A reset switching opens the filament and induces the opposite transition. The resistance switching is generally caused by the diffusion of oxygen vacancies, charge carrier trapping and detrapping, and Schottky barrier modulation to produce the memory effect [5]. The implementation in the industry of RRAM memory devices requires a detailed understanding of switching mechanisms, hence significant improvement in the knowledge limits is still needed. To expand the conventional characterization techniques spectrum of RRAM devices, we propose to study the small-signal parameters, namely, conductance ( G ) and susceptance ( B ) [6, 7]. They provide information about the physical nature of the switching mechanisms. Moreover, the read of the memory state is carried out without DC power consumption. Here we present comparative results of MIM-RRAM with different insulator and electrode materials. Admittance parameters were recorded by using a Keithley 4200SCS semiconductor analyzer. The bias voltage was applied to the top electrode with the bottom electrode grounded. A 30 mV rms-ac signal was superimposed to DC bias. A parallel admittance model which provides G and B values was selected to perform the characterization. To obtain the memory maps we apply a return-to-zero voltage pulse sequence as follows: with the sample at the HRS state, we apply a positive voltage pulse during 1 ms, and then the voltage returns to zero. At this moment we measure the admittance at 0 volts ( G 0 , B 0 ) . The pulse amplitude ( V P ) is linearly increased until the HRS to LRS state transition (set) occurs. Once the sample is at the LRS state, V P is linearly decreased to negative values. When V P reaches negative values enough to take the device back to the HRS state (reset), it is linearly increased a