a Study on Via Filling Performance in a High-Aspect-Ratio Though-Silicon Via with Various Conditions of Leveler

The void-free filling of high-aspect-ratio through silicon via (TSV) is one of the technical challenges for 3D integration. In order to fill the TSV without void, generally, copper was electroplated into an acid bath including organic additives of accelerator, suppressor and leveler. Especially, org...

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Veröffentlicht in:Meeting abstracts (Electrochemical Society) 2016-09, Vol.MA2016-02 (29), p.1899-1899
Hauptverfasser: Jin, SangHoon, Lee, Woon-Young, Lee, Dong-Ryul, Lee, Yu-Jin, Lee, SangYul, Lee, Min-Hyung
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Sprache:eng
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Zusammenfassung:The void-free filling of high-aspect-ratio through silicon via (TSV) is one of the technical challenges for 3D integration. In order to fill the TSV without void, generally, copper was electroplated into an acid bath including organic additives of accelerator, suppressor and leveler. Especially, organic additives play important role on inhibiting the TSV internal void by interaction between them [1-4]. In this research, we investigate the effect of chemical properties of levelers in copper electroplating bath on TSV filling performance. As the result, it was determined that TSV filling performance was strongly affected by molecular weight (mol. wt.) and nitrogen weight percentage per a monomer (N wt. %) of leveler. Only the levelers having less than mol. wt. 10,000 and over 20 N wt. % can succeed to fill a TSV without void under high speed electroplating of 1.3ASD. This result proves that the leveler with low mol. wt and high N wt. percent can inhibit the faster electroplating at the upper edge of TSV effectively even at the high current density. We confirmed the progress of void-free TSV filling under the optimized leveler condition using cross sectional optical microscope (OM) images according to plating time as shown in Fig.1. [1] H. Ling, H. Cao, Y Guo, H. Yu, M. Li and D. Mao, International Conference on Electronic Packaging Technology & High Density Packaging (2009) 860-862. [2] K. Zou, H. Ling, Q. Li, H. Cao, X. Yu, M. Li and D. Mao, International Conference on Electronic Packaging Technology & High Density Packaging (2009) 103-106. [3] L. Ma, H. Ling, M. Li, J. Sun, X. Yu and Y. Li, 14th International Conference on Electronic Packaging Technology (2013) 356-359 [4] R. Beica, C. Sharbono and Tom Ritzdorf, Electronic Components and Technology Conference (2008) 577-583 Fig.1. cross-sectional OM images of TSV electroplated under optimized leveler condition according to plating time: (a) 150 sec, (b) 300 sec (c) 600 sec (d) 700 sec Figure 1
ISSN:2151-2043
2151-2035
DOI:10.1149/MA2016-02/29/1899