(Invited) Physical Modeling of Charge Transport and Degradation in HfO 2 Stacks for Logic Device and Memory Applications

The understanding of the physical mechanisms responsible of charge transport and degradation in high-κ stacks is fundamental for the optimization of advanced logic (MOSFETs) and memory (RRAM, DRAM) devices. In this paper, we present a comprehensive physical model describing the charge transport and the degradation/breakdown processes in the HfO2 layer. This model allows gaining quantitative insights into the physics governing leakage current and degradation processes in HfO2 stacks, reproducing gate current and TDDB statistics