Passivation of Deep Levels at the SiO 2 /SiC Interface

The analysis of trapping phenomena in 4H- and 6H-SiC MOS capacitors from C-V and CCDLTS measurements is presented. Three categories of defect levels are distinguished: namely, oxide traps, semiconductor bulk traps, and interface states. NO annealing results in a dramatic decrease of the density of the interface states and the oxide traps in both polytypes, but does not reduce that of the SiC bulk traps.