Design of High-k Interfacial Layer Formation by Cycle-by-Cycle Deposition and Annealing Method

We have developed a process for forming an ultra-thin high-k interfacial layer (HfSiOx-IL or AlSiOx-IL) for high-k gate stacks. The HfSiOx-IL and AlSiOx-IL was grown by Cycle-by-Cycle Deposition & Annealing method (this method is called CC-D&A, and the IL deposited by this method is called CC-IL). This method utilizes the solid-phase reaction between high-k films (HfO2 or Al2O3) and Si-substrate performed by repeating the sequence of 1 cycle ALD HfO2 (or Al2O3) deposition and RTA. The CC-IL enables the formation of very uniform films consisting of a few mono-layers. In this paper, we demonstrated the physical properties for CC-IL, and electrical properties for high-k gate stacks with CC-IL, and we achieved 0.5nm-EOT high-k gate stacks of CMOS with gate-first process.