Bit Cost Scalable (BiCS) Flash Technology for Future Ultra High Density Storage Devices
We've proposed Bit Cost Scalable (BiCS) technology which realizes a 3D multi-stacked memory array with a few critical lithography steps regardless of number of stacked layers to keep a drastically continuous reduction of bit cost. The cell array concept, fabrication process, and key features ar...
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Veröffentlicht in: | ECS transactions 2009-03, Vol.18 (1), p.89-92 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
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Zusammenfassung: | We've proposed Bit Cost Scalable (BiCS) technology which realizes a 3D multi-stacked memory array with a few critical lithography steps regardless of number of stacked layers to keep a drastically continuous reduction of bit cost. The cell array concept, fabrication process, and key features are presented. |
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ISSN: | 1938-5862 1938-6737 |
DOI: | 10.1149/1.3096433 |