Study of SiGe Surface Cleaning

SiGe is a promising candidate to replace Si in Fin-shaped and GAA (gate all around) FETs (field-effect transistors) due to its higher carrier mobility. However, the presence of Ge oxide in the interfacial layer (IL) between the SiGe channel and HfO2 causes an increase in interface trap density (DIT)...

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Hauptverfasser: Komori, Kana, Wostyn, Kurt, Rondas, Dirk, Prado, Jana Loya, Conard, Thierry, Loo, Roger, Ragnarsson, Lars-Åke, Horiguchi, Naoto, Holsteyns, Frank
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container_start_page 141
container_title
container_volume 80
creator Komori, Kana
Wostyn, Kurt
Rondas, Dirk
Prado, Jana Loya
Conard, Thierry
Loo, Roger
Ragnarsson, Lars-Åke
Horiguchi, Naoto
Holsteyns, Frank
description SiGe is a promising candidate to replace Si in Fin-shaped and GAA (gate all around) FETs (field-effect transistors) due to its higher carrier mobility. However, the presence of Ge oxide in the interfacial layer (IL) between the SiGe channel and HfO2 causes an increase in interface trap density (DIT) and becomes in considerate as a defect of the device. In this study, the IL formation by a combined wet cleaning process with a subsequent annealing step is investigated by X-ray Photo-electron Spectroscopy (XPS). Finally we will present a process sequence leading up to a Ge-oxide free interlayer.
doi_str_mv 10.1149/08002.0141ecst
format Conference Proceeding
fullrecord <record><control><sourceid>iop_cross</sourceid><recordid>TN_cdi_crossref_primary_10_1149_08002_0141ecst</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>10.1149/08002.0141ecst</sourcerecordid><originalsourceid>FETCH-LOGICAL-c229t-b17943d3b71586ce092d28f5813e43736361c0d835a94baa1131550df2f70aa63</originalsourceid><addsrcrecordid>eNp1jz1PwzAQhi0EEqWwMqLMSCl3vsQfI4qgIFViCMyW49goVUkqOxn67wm0jEx3wz33vg9jtwgrxEI_gALgK8ACvUvjGVugJpULSfL8tJdK8Et2ldIWQMyMXLC7epzaQzaErO7WPqunGKzzWbXztu_6z2t2Eewu-ZvTXLKP56f36iXfvK1fq8dN7jjXY96g1AW11EicM5wHzVuuQqmQfEGSBAl00CoqrS4aaxEJyxLawIMEawUt2er418UhpeiD2cfuy8aDQTA_dubXzvzZzcD9EeiGvdkOU-znev8dfwOfS01-</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Study of SiGe Surface Cleaning</title><source>Institute of Physics Journals</source><creator>Komori, Kana ; Wostyn, Kurt ; Rondas, Dirk ; Prado, Jana Loya ; Conard, Thierry ; Loo, Roger ; Ragnarsson, Lars-Åke ; Horiguchi, Naoto ; Holsteyns, Frank</creator><creatorcontrib>Komori, Kana ; Wostyn, Kurt ; Rondas, Dirk ; Prado, Jana Loya ; Conard, Thierry ; Loo, Roger ; Ragnarsson, Lars-Åke ; Horiguchi, Naoto ; Holsteyns, Frank</creatorcontrib><description>SiGe is a promising candidate to replace Si in Fin-shaped and GAA (gate all around) FETs (field-effect transistors) due to its higher carrier mobility. However, the presence of Ge oxide in the interfacial layer (IL) between the SiGe channel and HfO2 causes an increase in interface trap density (DIT) and becomes in considerate as a defect of the device. In this study, the IL formation by a combined wet cleaning process with a subsequent annealing step is investigated by X-ray Photo-electron Spectroscopy (XPS). Finally we will present a process sequence leading up to a Ge-oxide free interlayer.</description><identifier>ISSN: 1938-5862</identifier><identifier>ISSN: 1938-6737</identifier><identifier>EISSN: 1938-6737</identifier><identifier>EISSN: 1938-5862</identifier><identifier>DOI: 10.1149/08002.0141ecst</identifier><language>eng</language><publisher>The Electrochemical Society, Inc</publisher><ispartof>ECS transactions, 2017, Vol.80 (2), p.141-146</ispartof><rights>2017 ECS - The Electrochemical Society</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://iopscience.iop.org/article/10.1149/08002.0141ecst/pdf$$EPDF$$P50$$Giop$$H</linktopdf><link.rule.ids>314,780,784,27924,27925,53846,53893</link.rule.ids></links><search><creatorcontrib>Komori, Kana</creatorcontrib><creatorcontrib>Wostyn, Kurt</creatorcontrib><creatorcontrib>Rondas, Dirk</creatorcontrib><creatorcontrib>Prado, Jana Loya</creatorcontrib><creatorcontrib>Conard, Thierry</creatorcontrib><creatorcontrib>Loo, Roger</creatorcontrib><creatorcontrib>Ragnarsson, Lars-Åke</creatorcontrib><creatorcontrib>Horiguchi, Naoto</creatorcontrib><creatorcontrib>Holsteyns, Frank</creatorcontrib><title>Study of SiGe Surface Cleaning</title><title>ECS transactions</title><addtitle>ECS Trans</addtitle><description>SiGe is a promising candidate to replace Si in Fin-shaped and GAA (gate all around) FETs (field-effect transistors) due to its higher carrier mobility. However, the presence of Ge oxide in the interfacial layer (IL) between the SiGe channel and HfO2 causes an increase in interface trap density (DIT) and becomes in considerate as a defect of the device. In this study, the IL formation by a combined wet cleaning process with a subsequent annealing step is investigated by X-ray Photo-electron Spectroscopy (XPS). Finally we will present a process sequence leading up to a Ge-oxide free interlayer.</description><issn>1938-5862</issn><issn>1938-6737</issn><issn>1938-6737</issn><issn>1938-5862</issn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2017</creationdate><recordtype>conference_proceeding</recordtype><recordid>eNp1jz1PwzAQhi0EEqWwMqLMSCl3vsQfI4qgIFViCMyW49goVUkqOxn67wm0jEx3wz33vg9jtwgrxEI_gALgK8ACvUvjGVugJpULSfL8tJdK8Et2ldIWQMyMXLC7epzaQzaErO7WPqunGKzzWbXztu_6z2t2Eewu-ZvTXLKP56f36iXfvK1fq8dN7jjXY96g1AW11EicM5wHzVuuQqmQfEGSBAl00CoqrS4aaxEJyxLawIMEawUt2er418UhpeiD2cfuy8aDQTA_dubXzvzZzcD9EeiGvdkOU-znev8dfwOfS01-</recordid><startdate>20170815</startdate><enddate>20170815</enddate><creator>Komori, Kana</creator><creator>Wostyn, Kurt</creator><creator>Rondas, Dirk</creator><creator>Prado, Jana Loya</creator><creator>Conard, Thierry</creator><creator>Loo, Roger</creator><creator>Ragnarsson, Lars-Åke</creator><creator>Horiguchi, Naoto</creator><creator>Holsteyns, Frank</creator><general>The Electrochemical Society, Inc</general><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20170815</creationdate><title>Study of SiGe Surface Cleaning</title><author>Komori, Kana ; Wostyn, Kurt ; Rondas, Dirk ; Prado, Jana Loya ; Conard, Thierry ; Loo, Roger ; Ragnarsson, Lars-Åke ; Horiguchi, Naoto ; Holsteyns, Frank</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c229t-b17943d3b71586ce092d28f5813e43736361c0d835a94baa1131550df2f70aa63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2017</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Komori, Kana</creatorcontrib><creatorcontrib>Wostyn, Kurt</creatorcontrib><creatorcontrib>Rondas, Dirk</creatorcontrib><creatorcontrib>Prado, Jana Loya</creatorcontrib><creatorcontrib>Conard, Thierry</creatorcontrib><creatorcontrib>Loo, Roger</creatorcontrib><creatorcontrib>Ragnarsson, Lars-Åke</creatorcontrib><creatorcontrib>Horiguchi, Naoto</creatorcontrib><creatorcontrib>Holsteyns, Frank</creatorcontrib><collection>CrossRef</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Komori, Kana</au><au>Wostyn, Kurt</au><au>Rondas, Dirk</au><au>Prado, Jana Loya</au><au>Conard, Thierry</au><au>Loo, Roger</au><au>Ragnarsson, Lars-Åke</au><au>Horiguchi, Naoto</au><au>Holsteyns, Frank</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Study of SiGe Surface Cleaning</atitle><btitle>ECS transactions</btitle><addtitle>ECS Trans</addtitle><date>2017-08-15</date><risdate>2017</risdate><volume>80</volume><issue>2</issue><spage>141</spage><epage>146</epage><pages>141-146</pages><issn>1938-5862</issn><issn>1938-6737</issn><eissn>1938-6737</eissn><eissn>1938-5862</eissn><abstract>SiGe is a promising candidate to replace Si in Fin-shaped and GAA (gate all around) FETs (field-effect transistors) due to its higher carrier mobility. However, the presence of Ge oxide in the interfacial layer (IL) between the SiGe channel and HfO2 causes an increase in interface trap density (DIT) and becomes in considerate as a defect of the device. In this study, the IL formation by a combined wet cleaning process with a subsequent annealing step is investigated by X-ray Photo-electron Spectroscopy (XPS). Finally we will present a process sequence leading up to a Ge-oxide free interlayer.</abstract><pub>The Electrochemical Society, Inc</pub><doi>10.1149/08002.0141ecst</doi><tpages>6</tpages></addata></record>
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1938-6737
1938-6737
1938-5862
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title Study of SiGe Surface Cleaning
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T14%3A15%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-iop_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Study%20of%20SiGe%20Surface%20Cleaning&rft.btitle=ECS%20transactions&rft.au=Komori,%20Kana&rft.date=2017-08-15&rft.volume=80&rft.issue=2&rft.spage=141&rft.epage=146&rft.pages=141-146&rft.issn=1938-5862&rft.eissn=1938-6737&rft_id=info:doi/10.1149/08002.0141ecst&rft_dat=%3Ciop_cross%3E10.1149/08002.0141ecst%3C/iop_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true