(Invited) Tunneling FET Technologies Using III-V and Ge Materials
We have demonstrated high performance operation of planar-type tunnel field-effect transistors (TFETs) using Ge/III-V materials. It is found that solid-phase Zn diffusion can realize steep-profile and defect-less p+/n source junctions. We have demonstrated the operation of high I on /I off and low S...
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| Veröffentlicht in: | ECS transactions 2015-09, Vol.69 (10), p.99-108 |
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| container_start_page | 99 |
| container_title | ECS transactions |
| container_volume | 69 |
| creator | Takagi, Shinichi Kim, Minsoo Noguchi, Mitsuhiro Nishi, Koichi Takenaka, Mitsuru |
| description | We have demonstrated high performance operation of planar-type tunnel field-effect transistors (TFETs) using Ge/III-V materials. It is found that solid-phase Zn diffusion can realize steep-profile and defect-less p+/n source junctions. We have demonstrated the operation of high I
on
/I
off
and low SS planar-type InGaAs tunnel FETs with Zn-diffused source junctions. The small S.S. of 64 mV/dec and large I
on
/I
off
ratio over10
6
has been realized in the planar-type III-V TFETs. It is also shown that tensile strain in Si channels (sSi) combined with the Ge source can enhance the tunneling current because of the reduced effective energy bandgap. The fabricated Ge/sSOI (1.1 %) TFETs show high I
on
/I
off
ratio over 10
7
and steep minimum subthreshold slope (SS) of 28 mV/dec. |
| doi_str_mv | 10.1149/06910.0099ecst |
| format | Article |
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on
/I
off
and low SS planar-type InGaAs tunnel FETs with Zn-diffused source junctions. The small S.S. of 64 mV/dec and large I
on
/I
off
ratio over10
6
has been realized in the planar-type III-V TFETs. It is also shown that tensile strain in Si channels (sSi) combined with the Ge source can enhance the tunneling current because of the reduced effective energy bandgap. The fabricated Ge/sSOI (1.1 %) TFETs show high I
on
/I
off
ratio over 10
7
and steep minimum subthreshold slope (SS) of 28 mV/dec.</description><identifier>ISSN: 1938-5862</identifier><identifier>EISSN: 1938-6737</identifier><identifier>DOI: 10.1149/06910.0099ecst</identifier><language>eng ; jpn</language><ispartof>ECS transactions, 2015-09, Vol.69 (10), p.99-108</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,27901,27902</link.rule.ids></links><search><creatorcontrib>Takagi, Shinichi</creatorcontrib><creatorcontrib>Kim, Minsoo</creatorcontrib><creatorcontrib>Noguchi, Mitsuhiro</creatorcontrib><creatorcontrib>Nishi, Koichi</creatorcontrib><creatorcontrib>Takenaka, Mitsuru</creatorcontrib><title>(Invited) Tunneling FET Technologies Using III-V and Ge Materials</title><title>ECS transactions</title><description>We have demonstrated high performance operation of planar-type tunnel field-effect transistors (TFETs) using Ge/III-V materials. It is found that solid-phase Zn diffusion can realize steep-profile and defect-less p+/n source junctions. We have demonstrated the operation of high I
on
/I
off
and low SS planar-type InGaAs tunnel FETs with Zn-diffused source junctions. The small S.S. of 64 mV/dec and large I
on
/I
off
ratio over10
6
has been realized in the planar-type III-V TFETs. It is also shown that tensile strain in Si channels (sSi) combined with the Ge source can enhance the tunneling current because of the reduced effective energy bandgap. The fabricated Ge/sSOI (1.1 %) TFETs show high I
on
/I
off
ratio over 10
7
and steep minimum subthreshold slope (SS) of 28 mV/dec.</description><issn>1938-5862</issn><issn>1938-6737</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><recordid>eNo1kD1PwzAURS0EEqWwMnuEwcUvJv4YqwpKpCKWlDWynZdiFBxkByT-PSkt07260rnDIeQa-ALg3txxaabKuTHo83hCZmCEZlIJdXrspZbFObnI-Z1zOTFqRpY3VfwOI7a3tP6KEfsQd_TxoaY1-rc49MMuYKbbvJ-rqmKv1MaWrpE-2xFTsH2-JGfdFHh1zDnZTvzqiW1e1tVquWEeVDkyiQAeHFjpXFtqrY3UyA236IT36IwSnlvlwYIySkJRgFROSdcBlsaXYk4Wh1-fhpwTds1nCh82_TTAm72A5k9A8y9A_AKkRk1U</recordid><startdate>20150914</startdate><enddate>20150914</enddate><creator>Takagi, Shinichi</creator><creator>Kim, Minsoo</creator><creator>Noguchi, Mitsuhiro</creator><creator>Nishi, Koichi</creator><creator>Takenaka, Mitsuru</creator><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20150914</creationdate><title>(Invited) Tunneling FET Technologies Using III-V and Ge Materials</title><author>Takagi, Shinichi ; Kim, Minsoo ; Noguchi, Mitsuhiro ; Nishi, Koichi ; Takenaka, Mitsuru</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c175t-6e11c1b1a6bbd5888968e090aeb3cceb973c0a7c1a17976122167b76bf1e59c53</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng ; jpn</language><creationdate>2015</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Takagi, Shinichi</creatorcontrib><creatorcontrib>Kim, Minsoo</creatorcontrib><creatorcontrib>Noguchi, Mitsuhiro</creatorcontrib><creatorcontrib>Nishi, Koichi</creatorcontrib><creatorcontrib>Takenaka, Mitsuru</creatorcontrib><collection>CrossRef</collection><jtitle>ECS transactions</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Takagi, Shinichi</au><au>Kim, Minsoo</au><au>Noguchi, Mitsuhiro</au><au>Nishi, Koichi</au><au>Takenaka, Mitsuru</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>(Invited) Tunneling FET Technologies Using III-V and Ge Materials</atitle><jtitle>ECS transactions</jtitle><date>2015-09-14</date><risdate>2015</risdate><volume>69</volume><issue>10</issue><spage>99</spage><epage>108</epage><pages>99-108</pages><issn>1938-5862</issn><eissn>1938-6737</eissn><abstract>We have demonstrated high performance operation of planar-type tunnel field-effect transistors (TFETs) using Ge/III-V materials. It is found that solid-phase Zn diffusion can realize steep-profile and defect-less p+/n source junctions. We have demonstrated the operation of high I
on
/I
off
and low SS planar-type InGaAs tunnel FETs with Zn-diffused source junctions. The small S.S. of 64 mV/dec and large I
on
/I
off
ratio over10
6
has been realized in the planar-type III-V TFETs. It is also shown that tensile strain in Si channels (sSi) combined with the Ge source can enhance the tunneling current because of the reduced effective energy bandgap. The fabricated Ge/sSOI (1.1 %) TFETs show high I
on
/I
off
ratio over 10
7
and steep minimum subthreshold slope (SS) of 28 mV/dec.</abstract><doi>10.1149/06910.0099ecst</doi><tpages>10</tpages></addata></record> |
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| identifier | ISSN: 1938-5862 |
| ispartof | ECS transactions, 2015-09, Vol.69 (10), p.99-108 |
| issn | 1938-5862 1938-6737 |
| language | eng ; jpn |
| recordid | cdi_crossref_primary_10_1149_06910_0099ecst |
| source | Institute of Physics Journals; Institute of Physics (IOP) Journals - HEAL-Link |
| title | (Invited) Tunneling FET Technologies Using III-V and Ge Materials |
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