Micro Unetched Oxide Defect during Buffered Oxide Etchant Process

There are two oxide regions, high and low voltage in NAND flash memory devices, in order to improve program speed and reliability. Generally, the two regions are achieved with pattern blocking by using PR(Photo Resistor) followed by etching of low voltage oxide with BOE(Buffered Oxide Etchant). Howe...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:ECS transactions 2013-08, Vol.58 (6), p.127-132
Hauptverfasser: Lim, SeungTaek, Ahn, Dukmin, Kim, Kihyun, Jung, Heechan, Lee, Byoungsu, Lee, Huihwan, Hwang, Hasub
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page 132
container_issue 6
container_start_page 127
container_title ECS transactions
container_volume 58
creator Lim, SeungTaek
Ahn, Dukmin
Kim, Kihyun
Jung, Heechan
Lee, Byoungsu
Lee, Huihwan
Hwang, Hasub
description There are two oxide regions, high and low voltage in NAND flash memory devices, in order to improve program speed and reliability. Generally, the two regions are achieved with pattern blocking by using PR(Photo Resistor) followed by etching of low voltage oxide with BOE(Buffered Oxide Etchant). However, as the 10nm scale NAND flash devices are massively manufactured, 0.2um size defects after oxide etching with BOE are newly detected. Partially unetched oxide defects in low voltage oxide region causes the thicker tunnel oxide and influences abnormal electron's tunneling. As the result, program and erase speed are declined on the relevant transistor, and it causes a yield drop by the electronic characteristics. As possible sources of the defects, the micro impurities in chemical or the micro bubbles from surfactant are suspected, but correct root cause is not yet known. In this study, the effects of filter pore size and nozzle movement of cleaning equipment are examined in other to reduce the defects.
doi_str_mv 10.1149/05806.0127ecst
format Article
fullrecord <record><control><sourceid>iop_cross</sourceid><recordid>TN_cdi_crossref_primary_10_1149_05806_0127ecst</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>10.1149/05806.0127ecst</sourcerecordid><originalsourceid>FETCH-LOGICAL-c74t-c00504b62c86e6bf382ccdeb28d4c294984788b99b700bdca7cc2c41b6f95cd23</originalsourceid><addsrcrecordid>eNp1jz1PwzAQhi0EEqWwMmdGSrAdxx9jKS0gFZWhzFZ8PkMqSCo7keDfE2hhY7qT7n1O70PIJaMFY8Jc00pTWVDGFULqj8iEmVLnUpXq-LBXWvJTcpbSllI5MmpCZo8NxC57brGHV_TZ-qPxmN1iQOgzP8SmfcluhhAw_h0XY7Ju--wpdoApnZOTUL8lvDjMKdksF5v5fb5a3z3MZ6sclOhzoLSiwkkOWqJ0odQcwKPj2gvgRhgtlNbOGKcodR5qBcBBMCeDqcDzckqK_duxbkoRg93F5r2On5ZR--1vf_ztr_8IXO2BptvZbTfEdmz3X_gLSJVb8w</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Micro Unetched Oxide Defect during Buffered Oxide Etchant Process</title><source>Institute of Physics Journals</source><creator>Lim, SeungTaek ; Ahn, Dukmin ; Kim, Kihyun ; Jung, Heechan ; Lee, Byoungsu ; Lee, Huihwan ; Hwang, Hasub</creator><creatorcontrib>Lim, SeungTaek ; Ahn, Dukmin ; Kim, Kihyun ; Jung, Heechan ; Lee, Byoungsu ; Lee, Huihwan ; Hwang, Hasub</creatorcontrib><description>There are two oxide regions, high and low voltage in NAND flash memory devices, in order to improve program speed and reliability. Generally, the two regions are achieved with pattern blocking by using PR(Photo Resistor) followed by etching of low voltage oxide with BOE(Buffered Oxide Etchant). However, as the 10nm scale NAND flash devices are massively manufactured, 0.2um size defects after oxide etching with BOE are newly detected. Partially unetched oxide defects in low voltage oxide region causes the thicker tunnel oxide and influences abnormal electron's tunneling. As the result, program and erase speed are declined on the relevant transistor, and it causes a yield drop by the electronic characteristics. As possible sources of the defects, the micro impurities in chemical or the micro bubbles from surfactant are suspected, but correct root cause is not yet known. In this study, the effects of filter pore size and nozzle movement of cleaning equipment are examined in other to reduce the defects.</description><identifier>ISSN: 1938-5862</identifier><identifier>EISSN: 1938-6737</identifier><identifier>DOI: 10.1149/05806.0127ecst</identifier><language>eng</language><publisher>The Electrochemical Society, Inc</publisher><ispartof>ECS transactions, 2013-08, Vol.58 (6), p.127-132</ispartof><rights>2013 ECS - The Electrochemical Society</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://iopscience.iop.org/article/10.1149/05806.0127ecst/pdf$$EPDF$$P50$$Giop$$H</linktopdf><link.rule.ids>314,780,784,27924,27925,53846,53893</link.rule.ids></links><search><creatorcontrib>Lim, SeungTaek</creatorcontrib><creatorcontrib>Ahn, Dukmin</creatorcontrib><creatorcontrib>Kim, Kihyun</creatorcontrib><creatorcontrib>Jung, Heechan</creatorcontrib><creatorcontrib>Lee, Byoungsu</creatorcontrib><creatorcontrib>Lee, Huihwan</creatorcontrib><creatorcontrib>Hwang, Hasub</creatorcontrib><title>Micro Unetched Oxide Defect during Buffered Oxide Etchant Process</title><title>ECS transactions</title><addtitle>ECS Trans</addtitle><description>There are two oxide regions, high and low voltage in NAND flash memory devices, in order to improve program speed and reliability. Generally, the two regions are achieved with pattern blocking by using PR(Photo Resistor) followed by etching of low voltage oxide with BOE(Buffered Oxide Etchant). However, as the 10nm scale NAND flash devices are massively manufactured, 0.2um size defects after oxide etching with BOE are newly detected. Partially unetched oxide defects in low voltage oxide region causes the thicker tunnel oxide and influences abnormal electron's tunneling. As the result, program and erase speed are declined on the relevant transistor, and it causes a yield drop by the electronic characteristics. As possible sources of the defects, the micro impurities in chemical or the micro bubbles from surfactant are suspected, but correct root cause is not yet known. In this study, the effects of filter pore size and nozzle movement of cleaning equipment are examined in other to reduce the defects.</description><issn>1938-5862</issn><issn>1938-6737</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><recordid>eNp1jz1PwzAQhi0EEqWwMmdGSrAdxx9jKS0gFZWhzFZ8PkMqSCo7keDfE2hhY7qT7n1O70PIJaMFY8Jc00pTWVDGFULqj8iEmVLnUpXq-LBXWvJTcpbSllI5MmpCZo8NxC57brGHV_TZ-qPxmN1iQOgzP8SmfcluhhAw_h0XY7Ju--wpdoApnZOTUL8lvDjMKdksF5v5fb5a3z3MZ6sclOhzoLSiwkkOWqJ0odQcwKPj2gvgRhgtlNbOGKcodR5qBcBBMCeDqcDzckqK_duxbkoRg93F5r2On5ZR--1vf_ztr_8IXO2BptvZbTfEdmz3X_gLSJVb8w</recordid><startdate>20130831</startdate><enddate>20130831</enddate><creator>Lim, SeungTaek</creator><creator>Ahn, Dukmin</creator><creator>Kim, Kihyun</creator><creator>Jung, Heechan</creator><creator>Lee, Byoungsu</creator><creator>Lee, Huihwan</creator><creator>Hwang, Hasub</creator><general>The Electrochemical Society, Inc</general><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20130831</creationdate><title>Micro Unetched Oxide Defect during Buffered Oxide Etchant Process</title><author>Lim, SeungTaek ; Ahn, Dukmin ; Kim, Kihyun ; Jung, Heechan ; Lee, Byoungsu ; Lee, Huihwan ; Hwang, Hasub</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c74t-c00504b62c86e6bf382ccdeb28d4c294984788b99b700bdca7cc2c41b6f95cd23</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Lim, SeungTaek</creatorcontrib><creatorcontrib>Ahn, Dukmin</creatorcontrib><creatorcontrib>Kim, Kihyun</creatorcontrib><creatorcontrib>Jung, Heechan</creatorcontrib><creatorcontrib>Lee, Byoungsu</creatorcontrib><creatorcontrib>Lee, Huihwan</creatorcontrib><creatorcontrib>Hwang, Hasub</creatorcontrib><collection>CrossRef</collection><jtitle>ECS transactions</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Lim, SeungTaek</au><au>Ahn, Dukmin</au><au>Kim, Kihyun</au><au>Jung, Heechan</au><au>Lee, Byoungsu</au><au>Lee, Huihwan</au><au>Hwang, Hasub</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Micro Unetched Oxide Defect during Buffered Oxide Etchant Process</atitle><jtitle>ECS transactions</jtitle><addtitle>ECS Trans</addtitle><date>2013-08-31</date><risdate>2013</risdate><volume>58</volume><issue>6</issue><spage>127</spage><epage>132</epage><pages>127-132</pages><issn>1938-5862</issn><eissn>1938-6737</eissn><abstract>There are two oxide regions, high and low voltage in NAND flash memory devices, in order to improve program speed and reliability. Generally, the two regions are achieved with pattern blocking by using PR(Photo Resistor) followed by etching of low voltage oxide with BOE(Buffered Oxide Etchant). However, as the 10nm scale NAND flash devices are massively manufactured, 0.2um size defects after oxide etching with BOE are newly detected. Partially unetched oxide defects in low voltage oxide region causes the thicker tunnel oxide and influences abnormal electron's tunneling. As the result, program and erase speed are declined on the relevant transistor, and it causes a yield drop by the electronic characteristics. As possible sources of the defects, the micro impurities in chemical or the micro bubbles from surfactant are suspected, but correct root cause is not yet known. In this study, the effects of filter pore size and nozzle movement of cleaning equipment are examined in other to reduce the defects.</abstract><pub>The Electrochemical Society, Inc</pub><doi>10.1149/05806.0127ecst</doi><tpages>6</tpages></addata></record>
fulltext fulltext
identifier ISSN: 1938-5862
ispartof ECS transactions, 2013-08, Vol.58 (6), p.127-132
issn 1938-5862
1938-6737
language eng
recordid cdi_crossref_primary_10_1149_05806_0127ecst
source Institute of Physics Journals
title Micro Unetched Oxide Defect during Buffered Oxide Etchant Process
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T03%3A30%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-iop_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Micro%20Unetched%20Oxide%20Defect%20during%20Buffered%20Oxide%20Etchant%20Process&rft.jtitle=ECS%20transactions&rft.au=Lim,%20SeungTaek&rft.date=2013-08-31&rft.volume=58&rft.issue=6&rft.spage=127&rft.epage=132&rft.pages=127-132&rft.issn=1938-5862&rft.eissn=1938-6737&rft_id=info:doi/10.1149/05806.0127ecst&rft_dat=%3Ciop_cross%3E10.1149/05806.0127ecst%3C/iop_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true