High Quality Silicon Cap Layer for 28nm and Beyond PMOS Processes

High quality embedded SiGe film with [Ge] concentration > 35% with Epitaxial grown Silicon (Si) cap layer has been demonstrated on a state-of-the-art 28nm logic flow. Si cap layer is a significant benefit to SiGe device for p-MOSFET contact resistance improvement but adversely affects the SiGe film strain relaxation especially for the high concentration [Ge] (> 35%). High quality, relaxation free SiGe film, with surface roughness improved from 4.21 to 0.65nm and 30% device contact resistance reduction are characterized in this work.