Substrate Design and Thermal Budget Tuning for Integration of Photonic Components in a High-Performance SiGe:C BiCMOS Process

We describe a scenario for FEOL integration of photonic components such as wave-guides and Ge photodiodes in a 200 GHz SiGe:C HBT BiCMOS process. We focus on two essential integration aspects. First, a novel, local-SOI approach is introduced which allows us to fabricate SOI-based photonic structures in a bulk BiCMOS environment. It is demonstrated in particular that the BiCMOS yield is not impaired by this approach. Second, we will show that the additional thermal budget of photodiode fabrication can seriously degrade BiCMOS devices parameters. We will offer a route to prevent that. These results pave the way for a new, modular photonic BiCMOS process.