High Hole Mobility in 65 nm Strained Ge p-Channel Field Effect Transistors with HfO 2 Gate Dielectric

Biaxially-strained Ge p-channel field effect transistors (pFETs) have been fabricated for the first time in a 65 nm technology. The devices are designed to have a reduced effective oxide thickness (EOT) while maintaining minimized short channel effects. Low and high field transport has been studied by in-depth electrical characterization, showing a high hole-mobility that is enhanced by up to 70% in the strained devices. The important role of pocket implants in degrading the drive current is highlighted. Using a judicious implantation scheme, we demonstrate a significant gain in on-current (up to 35%) for nanoscaled strained Ge pFETs. Simultaneous optimization of the gate metal and dielectric, together with the corresponding uniaxial stress engineering, is identified as a promising path for further performance enhancement.