Fabrication and Characteristics of Through Silicon Vias Interconnection by Electroplating
The electroplating method was improved using double anodes and a penetrated jig to fill high-aspect-ratio through silicon vias (TSVs) with copper. In this study, the double anodes were used to limit the formation of voids that degrade the electrical properties when the device is working. In addition...
Gespeichert in:
Veröffentlicht in: | Japanese Journal of Applied Physics 2011-01, Vol.50 (1), p.01BG07-01BG07-4 |
---|---|
Hauptverfasser: | , , , , |
Format: | Artikel |
Sprache: | eng |
Online-Zugang: | Volltext |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The electroplating method was improved using double anodes and a penetrated jig to fill high-aspect-ratio through silicon vias (TSVs) with copper. In this study, the double anodes were used to limit the formation of voids that degrade the electrical properties when the device is working. In addition, in this study we examined how the V-shaped electroplated copper is formed in the first electroplating step to seal openings. After establishing the conditions for electroplating using the double anodes and current wave, a void-free interconnection was fabricated, which consisted of TSVs with a diameter of 40 μm and an aspect ratios of $6.25:1$ and $10:1$ for silicon interposers. |
---|---|
ISSN: | 0021-4922 1347-4065 |
DOI: | 10.1143/JJAP.50.01BG07 |