Low-Voltage Pentacene Field-Effect Transistors Fabricated on High-Dielectric-Constant Strontium Titanate Insulator

A strontium titanate (SrTiO 3 ) thin film on a heavily doped n-type silicon wafer prepared by sputtering was characterized by various means. The result indicated that the thin film mainly consisted of an 87-nm-thick amorphous SrTiO 3 with a $\text{Sr}:\text{Ti}:\text{O}$ ratio of $1:1.3:4.7$, a dielectric constant of $\varepsilon_{\text{r}}=12.1$, and a leakage current density of 0.2 nA/cm 2 at an electric field of 1 MV/cm. Pentacene field-effect transistors fabricated using the SrTiO 3 thin film as an insulator, showed well-saturated output characteristics at low driving voltages ($V_{\text{D}}=-3$ V), and a hole mobility of 0.08 cm 2 V -1 s -1 , an on/off current ratio of $10^{4}$, and threshold voltage of $-0.7$ V.