Etch Defect Reduction Using SF 6 /O 2 Plasma Cleaning and Optimizing Etching Recipe in Photo Resist Masked Gate Poly Silicon Etch Process

This paper presents a significantly effective new method to reduce defects generated during photo resist (PR) masked gate poly-silicon etch process in decoupled plasma source (DPS) etching reactor. In the new method, etching reactor cleaning by SF 6 /O 2 plasma before processing product wafers is introduced to clear the extreme non-volatile by-products on the reactor surface, which is the source of defects. And, Y 2 O 3 in stead of Al 2 O 3 as reactor material is essential for the application of the SF 6 /O 2 plasma cleaning to suppress instable by-product deposition after the SF 6 /O 2 plasma cleaning. Additionally, the stabilization step in etching recipe is skipped to prevent the abrupt falling of by-products by instable plasma ignition at each etch step. The incorporation of the above three items significantly reduces the etch defects without any process performance shift in PR masked gate poly-silicon etch process using HBr/Cl 2 /O 2 chemicals.