Study of an Elevated Drain Fabrication Method for Ultra-Shallow Junction

An elevated diffusion layer fabricated from polycrystalline silicon (poly-Si) by solid phase diffusion was investigated in detail by secondary-ion mass spectroscopy (SIMS) analysis. We clarified that it was necessary to control the native oxide in the poly-Si/Si substrate interface and use small-gra...

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Veröffentlicht in:Japanese Journal of Applied Physics 2000-04, Vol.39 (4S), p.2155
Hauptverfasser: Nakano, Masayuki, Kotaki, Hiroshi, Sugimoto, Kazuo, Okumine, Tetsuya, Yoshioka, Fumiyoshi, Kakimoto, Seizo, Ohta, Kenji, Hashizume, Nobuo
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Sprache:eng
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Zusammenfassung:An elevated diffusion layer fabricated from polycrystalline silicon (poly-Si) by solid phase diffusion was investigated in detail by secondary-ion mass spectroscopy (SIMS) analysis. We clarified that it was necessary to control the native oxide in the poly-Si/Si substrate interface and use small-grained poly-Si to fabricate uniform and controllable shallow junctions. The low-capacitance sidewall-elevated drain (LCSED) metal oxide semiconductor field-effect transistor (MOSFET) fabricated by the oxygen-free load-lock low-pressure chemical vapor deposition (LPCVD) poly-Si (L/L poly-Si) was extremely effective for marked scaling down of transistor size and realizing an ultra low reversed junction leakage current.
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.39.2155