Suppressing Plasma Induced Degradation of Gate Oxide Using Silicon-on-Insulator Structures

Plasma-process induced degradation of gate oxide of metal/oxide/silicon (MOS) devices on silicon-on-insulator (SOI) structures and bulk wafers was investigated. In order to evaluate the degradation of the gate oxide, the charge-to-breakdown Q bd of the MOS capacitors was measured under a constant cu...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Japanese Journal of Applied Physics 1998-03, Vol.37 (3S), p.1278
Hauptverfasser: Kiyoshi Arita, Kiyoshi Arita, Masashi Akamatsu, Masashi Akamatsu, Tanemasa Asano, Tanemasa Asano
Format: Artikel
Sprache:eng
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Plasma-process induced degradation of gate oxide of metal/oxide/silicon (MOS) devices on silicon-on-insulator (SOI) structures and bulk wafers was investigated. In order to evaluate the degradation of the gate oxide, the charge-to-breakdown Q bd of the MOS capacitors was measured under a constant current condition. It was found that the degradation of the gate oxide could be drastically suppressed using SOI. A thicker buried oxide layer showed greater suppression of the gate oxide degradation. A smaller device island size showed lower gate oxide degradation, although the dependence was rather weak. An electrical model is discussed, to account for the effect of SOI, in which the capacitance of the buried oxide played a key role in suppressing the degradation.
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.37.1278