Single-electron transistor in silicon-on-insulator with Schottky-contact tunnel barriers

We have proposed a novel single-electron transistor (SET) with Schottky tunnel barriers. The proposed SET can be fabricated by employing the standard salicide process and can be merged in the current CMOS VLSI (complementary metal-oxide-semiconductor-very-large-scale integration). We analyzed its characteristics using the Poisson equation and the master equation based on the semi-classical theory. Calculation results show that the proposed SET has good cutoff characteristics similar to those of conventional MOSFETs (metal-oxide-semiconductor-field-effect transistors) while its gate-periodic characteristics are similar to those of conventional SETs.