The novel capacitor structure with polysilicon grain hole for advanced dynamic random access memory
A simple and new technique to realize relatively large capacitance for high density dynamic random access memory (DRAM) is discussed. This technique adopts the surface modulation technology on bottom electrode polysilicon of stacked capacitor structure, and holes are created in the bottom polysilico...
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Veröffentlicht in: | Japanese Journal of Applied Physics 1994, Vol.33 (1B), p.578-580 |
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Hauptverfasser: | , , , |
Format: | Artikel |
Sprache: | eng |
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Online-Zugang: | Volltext |
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Zusammenfassung: | A simple and new technique to realize relatively large capacitance for high density dynamic random access memory (DRAM) is discussed. This technique adopts the surface modulation technology on bottom electrode polysilicon of stacked capacitor structure, and holes are created in the bottom polysilicon grains. The grain holes are achieved by reactive ion etching (RIE) using the oxide at the grain boundary as etch mask. The capacitance can be increased up to four times, while keeping the leakage current comparable to that of conventional stacked capacitors. |
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ISSN: | 0021-4922 1347-4065 |
DOI: | 10.1143/jjap.33.578 |