Automated gate array scaling

Automated gate array scaling

A method for converting integrated circuit personalizations from a technology providing one set of design rules to a technology with a different and smaller set of design rules is presented. An example showing a conversion to a new technology where the cell area was reduced by 59 percent and the spe...

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Veröffentlicht in:IEEE transactions on electron devices 1984-01, Vol.31 (2), p.157-159
Hauptverfasser: Reasoner, K.J., Akers, L.A., Still, D.W.
Format: Artikel
Sprache:eng
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Beschreibung
Zusammenfassung:A method for converting integrated circuit personalizations from a technology providing one set of design rules to a technology with a different and smaller set of design rules is presented. An example showing a conversion to a new technology where the cell area was reduced by 59 percent and the speed was increased more than 40 percent is illustrated.
ISSN:0018-9383
1557-9646
DOI:10.1109/T-ED.1984.21493