Methods Used in an Automatic Logic Design Generator (ALERT)

Methods Used in an Automatic Logic Design Generator (ALERT)

The ALERT system converts preliminary high-level descriptions of computers into logic. The input to ALERT depicts the architecture of a proposed machine in a form of Iverson notation. As output, the architecture is "compiled" into Boolean equations, which may then be converted into standar...

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Veröffentlicht in:IEEE transactions on computers 1969-07, Vol.C-18 (7), p.593-614
Hauptverfasser: Friedman, T.D., Sih-Chin Yang
Format: Artikel
Sprache:eng
Schlagworte:
Architecture
automatic logic generation
compiler of computers
design automation
high-level computer description
Iverson notation
structural implementation of algorithms
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Beschreibung
Zusammenfassung:The ALERT system converts preliminary high-level descriptions of computers into logic. The input to ALERT depicts the architecture of a proposed machine in a form of Iverson notation. As output, the architecture is "compiled" into Boolean equations, which may then be converted into standard computer circuits.
ISSN:0018-9340
1557-9956
DOI:10.1109/T-C.1969.222727