Analysis and Design of Cost-Effective, High-Throughput LDPC Decoders

This paper introduces a new approach to cost-effective, high-throughput hardware designs for low-density parity-check (LDPC) decoders. The proposed approach, called nonsurjective finite alphabet iterative decoders (NS-FAIDs), exploits the robustness of message-passing LDPC decoders to inaccuracies i...

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Veröffentlicht in:	IEEE transactions on very large scale integration (VLSI) systems 2018-03, Vol.26 (3), p.508-521
Hauptverfasser:	Nguyen-Ly, Thien Truong, Savin, Valentin, Le, Khoa, Declercq, David, Ghaffari, Fakhreddine, Boncalo, Oana
Format:	Artikel
Sprache:	eng
Schlagworte:	Computer Science Decoding Electronics Engineering Sciences Error correction Forward error correction Hardware high throughput Information Theory Iterative decoding Kernel low cost low-density parity-check (LDPC) codes nonsurjective finite alphabet iterative decoder (NS-FAID) Signal and Image processing Throughput
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