A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration

A 0.9-5.8-GHz receiver RF front-end (RFE) integrating a dual-band low-noise transconductance amplifier (LNTA), a passive harmonic-rejection (HR) down-conversion mixer, and an all-digital frequency synthesizer for software-defined radios are presented. A switchable three-coil transformer acting as th...

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Veröffentlicht in:IEEE transactions on very large scale integration (VLSI) systems 2017-08, Vol.25 (8), p.2371-2382
Hauptverfasser: Liang Wu, Ng, Alan W. L., Shiyuan Zheng, Hiu Fai Leung, Yue Chao, Alvin Li, Luong, Howard C.
Format: Artikel
Sprache:eng
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Zusammenfassung:A 0.9-5.8-GHz receiver RF front-end (RFE) integrating a dual-band low-noise transconductance amplifier (LNTA), a passive harmonic-rejection (HR) down-conversion mixer, and an all-digital frequency synthesizer for software-defined radios are presented. A switchable three-coil transformer acting as the interface between the LNTA and the mixer features current-gain boosting in addition to wideband operation. Automatic local oscillator phase-error detection and calibration circuitry is implemented for the mixers to achieve high HR ratio (HRR). Fabricated in 65-nm CMOS, the RFE measures the noise figure between 2.9 and 3.8 dB, the third-order input intercept point (IIP3) between -1.6 and -12.8 dBm, the third-order HRR of 81 dB, and the fifth-order HRR of 70 dB, while consuming 66-82 mA from a 1.2-V supply and occupying a chip area of 4.2 mm 2 .
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2017.2695719