Arithmetic-Based Binary-to-RNS Converter Modulo k\}} for jn -bit Dynamic Range
In this brief, a read-only-memoryless structure for binaryto-residue number system (RNS) conversion modulo (2 n ±k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing (2 n ± k} binary-to-RNS converters, which are particular inefficie...
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Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems 2015-03, Vol.23 (3), p.603-607 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In this brief, a read-only-memoryless structure for binaryto-residue number system (RNS) conversion modulo (2 n ±k} is proposed. This structure is based only on adders and constant multipliers. This brief is motivated by the existing (2 n ± k} binary-to-RNS converters, which are particular inefficient for larger values of n. The experimental results obtained for 4n and 8n bits of dynamic range suggest that the proposed conversion structures are able to significantly improve the forward conversion efficiency, with an AT metric improvement above 100%, regarding the related state of the art. Delay improvements of 2.17 times with only 5% area increase can be achieved if a proper selection of the (2 n ± k} moduli is performed. |
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ISSN: | 1063-8210 1557-9999 |
DOI: | 10.1109/TVLSI.2014.2314174 |