Differential Analog Layout for Improved ASET Tolerance

Differential Analog Layout for Improved ASET Tolerance

Single-event transients (SETs) affecting a single side of a differential data path have been shown to cause signal degradation and data loss. A radiation hardened by design (RHBD) transistor layout technique is demonstrated that promotes charge collection on both sides of the differential data path....

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Veröffentlicht in:IEEE transactions on nuclear science 2007-12, Vol.54 (6), p.2053-2059
Hauptverfasser: Kelly, A.T., Fleming, P.R., Holman, W.T., Witulski, A.F., Bhuva, B.L., Massengill, L.W.
Format: Artikel
Sprache:eng
Schlagworte:
Amplitudes
Analog circuits
Capacitance
Charge
Circuits
Collection
Data paths
Degradation
Differential amplifiers
Differential circuits
Electric potential
Fabrication
layout mitigation technique
Radiation hardening
radiation hardening by design (RHBD)
single-event transient (SET)
Space technology
Tolerances
Transistors
Voltage
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Beschreibung
Zusammenfassung:Single-event transients (SETs) affecting a single side of a differential data path have been shown to cause signal degradation and data loss. A radiation hardened by design (RHBD) transistor layout technique is demonstrated that promotes charge collection on both sides of the differential data path. The induced common-mode error voltage is suppressed by the differential circuit, significantly reducing the SET amplitude.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2007.910124