A Radiation-Hard Silicon Gate Bulk CMOS Cell Family

A Radiation-Hard Silicon Gate Bulk CMOS Cell Family

A radiation-hardened silicon gate CMOS two-port standard cell family utilizing a linear array layout topology with six to seven micron design rules and guardbanded n-channel devices has been developed. The process, structure, performance, and applications of this Expanded Linear Array (ELA) technolo...

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Veröffentlicht in:IEEE transactions on nuclear science 1980-01, Vol.27 (6), p.1712-1715
Hauptverfasser: Gibbon, Charles F., Habing, Donald H., Flores, Richard S.
Format: Artikel
Sprache:eng
Schlagworte:
Aluminum
CMOS technology
Etching
Implants
Integrated circuit interconnections
Laboratories
Routing
Silicon
Standards development
Threshold voltage
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container_end_page 1715
container_issue 6
container_start_page 1712
container_title IEEE transactions on nuclear science
container_volume 27
creator Gibbon, Charles F.
Habing, Donald H.
Flores, Richard S.
description A radiation-hardened silicon gate CMOS two-port standard cell family utilizing a linear array layout topology with six to seven micron design rules and guardbanded n-channel devices has been developed. The process, structure, performance, and applications of this Expanded Linear Array (ELA) technology are described.
doi_str_mv 10.1109/TNS.1980.4331093
format Article
fullrecord <record><control><sourceid>proquest_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TNS_1980_4331093</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>4331093</ieee_id><sourcerecordid>23853766</sourcerecordid><originalsourceid>FETCH-LOGICAL-c365t-bb1cf0cd1265cfa53bdb0a6d1d419d2fe6dfae971719f1eb00fd56f11c465a1f3</originalsourceid><addsrcrecordid>eNqNkD1PwzAQhi0EEqWwI7F4YkvwxbETjyWiLVKhEimz5fhDMqRNsdOh_76pWpiZTq_ueU-nB6F7ICkAEU-r9zoFUZI0p3TI9AKNgLEyAVaUl2hECJSJyIW4Rjcxfg0xZ4SNEJ3gD2W86n23SeYqGFz71utug2eqt_h5137j6m1Z48q2LZ6qtW_3t-jKqTbau_Mco8_py6qaJ4vl7LWaLBJNOeuTpgHtiDaQcaadYrQxDVHcgMlBmMxZbpyyooAChAPbEOIM4w5A55wpcHSMHk93t6H72dnYy7WPevhDbWy3izKjJaMF5_8Cs6KgA0hOoA5djME6uQ1-rcJeApFHjXLQKI8a5VnjUHk4Vby19g__3R4AEfZsjw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>23852773</pqid></control><display><type>article</type><title>A Radiation-Hard Silicon Gate Bulk CMOS Cell Family</title><source>IEEE Electronic Library (IEL)</source><creator>Gibbon, Charles F. ; Habing, Donald H. ; Flores, Richard S.</creator><creatorcontrib>Gibbon, Charles F. ; Habing, Donald H. ; Flores, Richard S.</creatorcontrib><description>A radiation-hardened silicon gate CMOS two-port standard cell family utilizing a linear array layout topology with six to seven micron design rules and guardbanded n-channel devices has been developed. The process, structure, performance, and applications of this Expanded Linear Array (ELA) technology are described.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/TNS.1980.4331093</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>IEEE</publisher><subject>Aluminum ; CMOS technology ; Etching ; Implants ; Integrated circuit interconnections ; Laboratories ; Routing ; Silicon ; Standards development ; Threshold voltage</subject><ispartof>IEEE transactions on nuclear science, 1980-01, Vol.27 (6), p.1712-1715</ispartof><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c365t-bb1cf0cd1265cfa53bdb0a6d1d419d2fe6dfae971719f1eb00fd56f11c465a1f3</citedby><cites>FETCH-LOGICAL-c365t-bb1cf0cd1265cfa53bdb0a6d1d419d2fe6dfae971719f1eb00fd56f11c465a1f3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4331093$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4331093$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Gibbon, Charles F.</creatorcontrib><creatorcontrib>Habing, Donald H.</creatorcontrib><creatorcontrib>Flores, Richard S.</creatorcontrib><title>A Radiation-Hard Silicon Gate Bulk CMOS Cell Family</title><title>IEEE transactions on nuclear science</title><addtitle>TNS</addtitle><description>A radiation-hardened silicon gate CMOS two-port standard cell family utilizing a linear array layout topology with six to seven micron design rules and guardbanded n-channel devices has been developed. The process, structure, performance, and applications of this Expanded Linear Array (ELA) technology are described.</description><subject>Aluminum</subject><subject>CMOS technology</subject><subject>Etching</subject><subject>Implants</subject><subject>Integrated circuit interconnections</subject><subject>Laboratories</subject><subject>Routing</subject><subject>Silicon</subject><subject>Standards development</subject><subject>Threshold voltage</subject><issn>0018-9499</issn><issn>1558-1578</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1980</creationdate><recordtype>article</recordtype><recordid>eNqNkD1PwzAQhi0EEqWwI7F4YkvwxbETjyWiLVKhEimz5fhDMqRNsdOh_76pWpiZTq_ueU-nB6F7ICkAEU-r9zoFUZI0p3TI9AKNgLEyAVaUl2hECJSJyIW4Rjcxfg0xZ4SNEJ3gD2W86n23SeYqGFz71utug2eqt_h5137j6m1Z48q2LZ6qtW_3t-jKqTbau_Mco8_py6qaJ4vl7LWaLBJNOeuTpgHtiDaQcaadYrQxDVHcgMlBmMxZbpyyooAChAPbEOIM4w5A55wpcHSMHk93t6H72dnYy7WPevhDbWy3izKjJaMF5_8Cs6KgA0hOoA5djME6uQ1-rcJeApFHjXLQKI8a5VnjUHk4Vby19g__3R4AEfZsjw</recordid><startdate>19800101</startdate><enddate>19800101</enddate><creator>Gibbon, Charles F.</creator><creator>Habing, Donald H.</creator><creator>Flores, Richard S.</creator><general>IEEE</general><scope>AAYXX</scope><scope>CITATION</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope><scope>7SP</scope></search><sort><creationdate>19800101</creationdate><title>A Radiation-Hard Silicon Gate Bulk CMOS Cell Family</title><author>Gibbon, Charles F. ; Habing, Donald H. ; Flores, Richard S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c365t-bb1cf0cd1265cfa53bdb0a6d1d419d2fe6dfae971719f1eb00fd56f11c465a1f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1980</creationdate><topic>Aluminum</topic><topic>CMOS technology</topic><topic>Etching</topic><topic>Implants</topic><topic>Integrated circuit interconnections</topic><topic>Laboratories</topic><topic>Routing</topic><topic>Silicon</topic><topic>Standards development</topic><topic>Threshold voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gibbon, Charles F.</creatorcontrib><creatorcontrib>Habing, Donald H.</creatorcontrib><creatorcontrib>Flores, Richard S.</creatorcontrib><collection>CrossRef</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Electronics &amp; Communications Abstracts</collection><jtitle>IEEE transactions on nuclear science</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gibbon, Charles F.</au><au>Habing, Donald H.</au><au>Flores, Richard S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A Radiation-Hard Silicon Gate Bulk CMOS Cell Family</atitle><jtitle>IEEE transactions on nuclear science</jtitle><stitle>TNS</stitle><date>1980-01-01</date><risdate>1980</risdate><volume>27</volume><issue>6</issue><spage>1712</spage><epage>1715</epage><pages>1712-1715</pages><issn>0018-9499</issn><eissn>1558-1578</eissn><coden>IETNAE</coden><abstract>A radiation-hardened silicon gate CMOS two-port standard cell family utilizing a linear array layout topology with six to seven micron design rules and guardbanded n-channel devices has been developed. The process, structure, performance, and applications of this Expanded Linear Array (ELA) technology are described.</abstract><pub>IEEE</pub><doi>10.1109/TNS.1980.4331093</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record>
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1558-1578
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subjects Aluminum
CMOS technology
Etching
Implants
Integrated circuit interconnections
Laboratories
Routing
Silicon
Standards development
Threshold voltage
title A Radiation-Hard Silicon Gate Bulk CMOS Cell Family
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-19T16%3A15%3A10IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%20Radiation-Hard%20Silicon%20Gate%20Bulk%20CMOS%20Cell%20Family&rft.jtitle=IEEE%20transactions%20on%20nuclear%20science&rft.au=Gibbon,%20Charles%20F.&rft.date=1980-01-01&rft.volume=27&rft.issue=6&rft.spage=1712&rft.epage=1715&rft.pages=1712-1715&rft.issn=0018-9499&rft.eissn=1558-1578&rft.coden=IETNAE&rft_id=info:doi/10.1109/TNS.1980.4331093&rft_dat=%3Cproquest_RIE%3E23853766%3C/proquest_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=23852773&rft_id=info:pmid/&rft_ieee_id=4331093&rfr_iscdi=true