A Balanced Distributed Cascode Power Amplifier With an Integrated Chebyshev Load Balancer for Full-Duplex Wireless Operation

This work proposes a fully integrated transmitter front end based on a balanced distributed cascode power amplifier (BDC-PA) and a passive second-order reconfigurable reflective self-interference cancellation (SIC) filter for full-duplex wireless applications. The balanced topology provides inherent passive transmit-receive (TX-RX) isolation complemented by the passive SIC filter, which accounts for the signal, noise, and nonlinearity components of the direct TX-RX leakages and the reflections from a commercial Wi-Fi antenna. A digital cancellation technique is used to enhance the overall cancellation. A front-end chip prototype fabricated in TSMC's 65-nm CMOS process operating between 5 and 6 GHz and occupying the area of 1.2 mm2 achieves 19.5-dBm P {_{\text {sat}}} with 31% peak PAE, 17-dBm OP1dB, and 8-10-dB RX noise figure (NF). The analog SIC achieves 40 dB of TX-RX isolation, and an overall cancellation of 78 dB is observed using the digital algorithm. The TX achieves an error-vector magnitude (EVM) of −30 dB at 10-dB power backoff using a 20-MHz Wi-Fi OFDM signal without DPD.