PB+-Tree: PCM-Aware B+-Tree

Phase change memory (PCM) is non-volatile memory that is byte-addressable. It is two to four times denser than DRAM, orders of magnitude better than NAND Flash memory in read latency, and 10 times better than NAND Flash memory in write endurance. However, it still limits the number of write operations to at most 106 times per PCM cell. To extend its lifetime, it is necessary to evenly distribute write operations over all the memory cells. Up to now, the B + -Tree index structure has been used to quickly locate a search key in a relational database management system (RDBMS). All the record keys in each node are sorted and packed upon insertion in, and deletion from, the B + -Tree. In addition, a counter keeps track of the number of valid keys in the B + -Tree. Consequently, a B + -Tree algorithm results in a large number of write operations, which deteriorates the endurance of PCM. This restricts the usage of PCM on a database server and deteriorates performance of database servers. In this paper, we propose a novel PCM-aware B + -Tree index structure, called PB + -Tree, to provide wear-leveling in PCM. According to our experiment results, PB + -Tree is much faster than the existing B + -Tree algorithms for PCM and NAND Flash memory with versatile workloads. More importantly, our scheme also greatly reduces the number of write operations compared to other B + -Tree algorithms. All of these results suggest that PB + -Tree is the B + -Tree algorithm best fitted to PCM.