Maximum sensitivity constrained graphical controller tuning for a DC-DC boost converter loaded with a CPL

Owing to the negative impedance instability of the constant power load (CPL), oscillations are induced in the output voltage of the boost converter which may lead to voltage collapse. This paper proposes a graphical strategy to tune a PID controller for the boost converter loaded with a CPL. The idea of root crossing boundaries is applied to compute the all stability region. Robustness and relative stability of the system are addressed by obtaining the desired maximum sensitivity region (DMSR) within the all stability region. Required controller parameters are obtained by finding the centroid of the DMSR. A novel technique to select the derivative gain of the PID controller from the trade-off curve between disturbance rejection and noise suppression abilities, is also proposed. Experimental results with comparison are provided to show the effectiveness of the presented scheme.