Prepreg and Core Dielectric Permittivity (ϵr) Extraction for Fabricated Striplines' Far-End Crosstalk Modeling

As the data rate and density of digital high-speed systems are getting higher, far-end crosstalk (FEXT) noise becomes one of the major issues that limit signal integrity performance. It was commonly believed that FEXT would be eliminated for striplines routed in a homogeneous dielectric, but in reality, FEXT can always be measured in striplines on the fabricated printed circuit boards. A slightly different dielectric permittivity ({{\boldsymbol{\varepsilon }}_{\boldsymbol{r}}}) of prepreg and core may be one of the major contributors to the FEXT. This article is focusing on providing a practical FEXT modeling methodology for striplines by introducing an approach to extract {{\boldsymbol{\varepsilon }}_{\boldsymbol{r}}} of prepreg and core. Using the known cross-sectional geometry and measured S -parameters of the coupled stripline, the capacitance components in prepreg and core are separated using a two-dimensional solver, and the {{\boldsymbol{\varepsilon }}_{\boldsymbol{r}}} of prepreg and core is determined. A more comprehensive FEXT modeling approach is proposed by applying extracted inhomogeneous dielectric material information.