Low-Temperature Deuterium Annealing for High-Performance and Reliable Poly-Si Channel Thin-Film Transistors

Post-metallization annealing (PMA) is used in device fabrication to improve MOSFET performance and reliability and is typically carried out at 400 ^{\circ} C or higher. However, high-temperature PMA can result in unexpected junction modifications and dopant deactivation. As an alternative, low-temperature deuterium annealing (LTDA), which is performed at an annealing temperature 100 ^{\circ} C lower than the conventional PMA, is introduced. The LTDA effectively reduces the traps in the silicon channel and SiO _{\text{2}} dielectric e.g., gate dielectric and buried oxide (BOX) with a low-thermal budget. Poly-Si channel thin-film transistors (TFTs) are fabricated as test vehicles (TVs) to verify the impact of LTDA. The electrical characterization of subthreshold swing (SS), threshold voltage ( \textit{V}_{\text{TH}} ), ON-state current ( \textit{I}_{\biosc{on}} ), OFF-state current ( \textit{I}_{\biosc{off}} ), and gate leakage ( \textit{I}_{\text{G}} ) is comparatively studied with and without LTDA. The long-term reliability of the device following LTDA under hot-carrier injection (HCI) stress condition is confirmed. Finally, further investigation was carried out on the reduced sheet resistance ( R_{\text{sheet}} ) and surface roughness of the poly-Si gate. The improvement of poly-Si roughness under diluted deuterium ambient is investigated for the first time.