High Uniformity Normally-OFF p-GaN Gate HEMT Using Self-Terminated Digital Etching Technique

A normally-OFF p-GaN gate AlGaN/GaN high-electron-mobility transistor with high ON-state resistance ( {R}_{ \mathrm{\scriptscriptstyle ON}} ) uniformity was realized using a self-terminated digital etching technique. {R}_{ \mathrm{\scriptscriptstyle ON}} uniformity control was improved by simultan...

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Veröffentlicht in:IEEE transactions on electron devices 2018-11, Vol.65 (11), p.4820-4825
Hauptverfasser: Chiu, Hsien-Chin, Chang, Yi-Sheng, Li, Bo-Hong, Wang, Hsiang-Chun, Kao, Hsuan-Ling, Chien, Feng-Tso, Hu, Chih-Wei, Xuan, Rong
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container_issue 11
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container_title IEEE transactions on electron devices
container_volume 65
creator Chiu, Hsien-Chin
Chang, Yi-Sheng
Li, Bo-Hong
Wang, Hsiang-Chun
Kao, Hsuan-Ling
Chien, Feng-Tso
Hu, Chih-Wei
Xuan, Rong
description A normally-OFF p-GaN gate AlGaN/GaN high-electron-mobility transistor with high ON-state resistance ( {R}_{ \mathrm{\scriptscriptstyle ON}} ) uniformity was realized using a self-terminated digital etching technique. {R}_{ \mathrm{\scriptscriptstyle ON}} uniformity control was improved by simultaneously using an AlN etching stop layer in an epitaxial design and a novel digital etching procedure. Digital etching includes the multiple-cycle oxidation and the wet etching of p-GaN layers and provides easy control of p-GaN removal depth and surface damage reduction at the gate-to-drain and gate-to-source spacing areas. Low-frequency noise and pulse measurements indicated that device surface traps and current collapse phenomena were suppressed.
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Digital etching includes the multiple-cycle oxidation and the wet etching of p-GaN layers and provides easy control of p-GaN removal depth and surface damage reduction at the gate-to-drain and gate-to-source spacing areas. Low-frequency noise and pulse measurements indicated that device surface traps and current collapse phenomena were suppressed.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2018.2871689</doi><tpages>6</tpages><orcidid>https://orcid.org/0000-0001-9448-9908</orcidid><orcidid>https://orcid.org/0000-0002-4097-6046</orcidid><orcidid>https://orcid.org/0000-0003-1068-5798</orcidid></addata></record>
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subjects Aluminum gallium nitrides
Aluminum nitride
Digital etching
Etching
Gallium nitride
Gallium nitrides
GaN
HEMTs
Logic gates
normally-OFF
Oxidation
Plasmas
pulse measurement
title High Uniformity Normally-OFF p-GaN Gate HEMT Using Self-Terminated Digital Etching Technique
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