Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

The metal-gate granularity-induced threshold voltage (V T ) variability and V T mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The impact of meta...

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Veröffentlicht in:IEEE transactions on electron devices 2014-11, Vol.61 (11), p.3892-3895
Hauptverfasser: Nayak, Kaushik, Agarwal, Samarth, Bajaj, Mohit, Oldiges, Philip J., Murali, Kota V. R. M., Rao, Valipe Ramgopal
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Sprache:eng
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Zusammenfassung:The metal-gate granularity-induced threshold voltage (V T ) variability and V T mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The impact of metal-gate crystal grain size on linear and saturation mode V T variability are analyzed. The V T mismatch study predicts lower mismatch figure of merit (A VT ) in TiN-gated Si GAA n-NWFETs compared with the reported experimental mismatch data for TiN-gated Si FinFETs.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2014.2351401