Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters
We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100...
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| Veröffentlicht in: | IEEE transactions on electron devices 2012-09, Vol.59 (9), p.2524-2530 |
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| container_issue | 9 |
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| container_title | IEEE transactions on electron devices |
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| creator | Guerrera, Stephen A. Velasquez-Garcia, Luis Fernando Akinwande, Akintunde Ibitayo |
| description | We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100-nm-diameter and 10- \mu\hbox{m} -tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 \mu\hbox{A/cm}^{2} were obtained from 1.36 million emitter arrays with 5- \mu\hbox{m} pitch. |
| doi_str_mv | 10.1109/TED.2012.2204262 |
| format | Article |
| fullrecord | <record><control><sourceid>pascalfrancis_RIE</sourceid><recordid>TN_cdi_crossref_primary_10_1109_TED_2012_2204262</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>6261534</ieee_id><sourcerecordid>26323964</sourcerecordid><originalsourceid>FETCH-LOGICAL-c293t-6f6442213ebe0085064260515f21bb79ed6ed2238b8e7323a61ebed4b581fc243</originalsourceid><addsrcrecordid>eNo9kM1LwzAYh4MoOKd3wUsuHjuTNx9rj3NublAQdJ5L2r7ZIl07kk7Yf2_Khqfwkt_zfjyEPHI24ZxlL5vF2wQYhwkAk6Dhioy4UtMk01JfkxFjPE0ykYpbchfCTyy1lDAi-6_KNK7d0s7Sldvuklk4YNUnn6Z3HZ0fvce2p7nbux59oLbztN8hXbe1-3X10TT01TSNCf2lR278FunMe3MKQ7102NR0EfGBvyc31jQBHy7vmHwvF5v5Ksk_3tfzWZ5UkIk-0XZYDrjAEhlLFdPxIqa4ssDLcpphrbEGEGmZ4lSAMJrHZC1LlXJbgRRjws59K9-F4NEWB-_2xp8KzopBVxF1FYOu4qIrIs9n5GBCVGK9aSsX_jnQcU50GXNP55xDxP9vDZorIcUfOfRy1w</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters</title><source>IEEE Electronic Library (IEL)</source><creator>Guerrera, Stephen A. ; Velasquez-Garcia, Luis Fernando ; Akinwande, Akintunde Ibitayo</creator><creatorcontrib>Guerrera, Stephen A. ; Velasquez-Garcia, Luis Fernando ; Akinwande, Akintunde Ibitayo</creatorcontrib><description>We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100-nm-diameter and 10- \mu\hbox{m} -tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 \mu\hbox{A/cm}^{2} were obtained from 1.36 million emitter arrays with 5- \mu\hbox{m} pitch.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2012.2204262</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Ballasting ; cathodes ; Current limiters ; Doping ; Electrical engineering. Electrical power engineering ; electron supply control ; Electronic ballasts ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; Electronics ; Exact sciences and technology ; Fabrication ; FETs ; Logic gates ; Power electronics, power supplies ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Si field-emission arrays ; Silicon ; Transistors ; Vacuum microelectronics ; vertical ungated Si field-effect transistors (FETs)</subject><ispartof>IEEE transactions on electron devices, 2012-09, Vol.59 (9), p.2524-2530</ispartof><rights>2015 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c293t-6f6442213ebe0085064260515f21bb79ed6ed2238b8e7323a61ebed4b581fc243</citedby><cites>FETCH-LOGICAL-c293t-6f6442213ebe0085064260515f21bb79ed6ed2238b8e7323a61ebed4b581fc243</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6261534$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/6261534$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=26323964$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Guerrera, Stephen A.</creatorcontrib><creatorcontrib>Velasquez-Garcia, Luis Fernando</creatorcontrib><creatorcontrib>Akinwande, Akintunde Ibitayo</creatorcontrib><title>Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100-nm-diameter and 10- \mu\hbox{m} -tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 \mu\hbox{A/cm}^{2} were obtained from 1.36 million emitter arrays with 5- \mu\hbox{m} pitch.</description><subject>Applied sciences</subject><subject>Ballasting</subject><subject>cathodes</subject><subject>Current limiters</subject><subject>Doping</subject><subject>Electrical engineering. Electrical power engineering</subject><subject>electron supply control</subject><subject>Electronic ballasts</subject><subject>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Fabrication</subject><subject>FETs</subject><subject>Logic gates</subject><subject>Power electronics, power supplies</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Si field-emission arrays</subject><subject>Silicon</subject><subject>Transistors</subject><subject>Vacuum microelectronics</subject><subject>vertical ungated Si field-effect transistors (FETs)</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2012</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM1LwzAYh4MoOKd3wUsuHjuTNx9rj3NublAQdJ5L2r7ZIl07kk7Yf2_Khqfwkt_zfjyEPHI24ZxlL5vF2wQYhwkAk6Dhioy4UtMk01JfkxFjPE0ykYpbchfCTyy1lDAi-6_KNK7d0s7Sldvuklk4YNUnn6Z3HZ0fvce2p7nbux59oLbztN8hXbe1-3X10TT01TSNCf2lR278FunMe3MKQ7102NR0EfGBvyc31jQBHy7vmHwvF5v5Ksk_3tfzWZ5UkIk-0XZYDrjAEhlLFdPxIqa4ssDLcpphrbEGEGmZ4lSAMJrHZC1LlXJbgRRjws59K9-F4NEWB-_2xp8KzopBVxF1FYOu4qIrIs9n5GBCVGK9aSsX_jnQcU50GXNP55xDxP9vDZorIcUfOfRy1w</recordid><startdate>20120901</startdate><enddate>20120901</enddate><creator>Guerrera, Stephen A.</creator><creator>Velasquez-Garcia, Luis Fernando</creator><creator>Akinwande, Akintunde Ibitayo</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20120901</creationdate><title>Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters</title><author>Guerrera, Stephen A. ; Velasquez-Garcia, Luis Fernando ; Akinwande, Akintunde Ibitayo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c293t-6f6442213ebe0085064260515f21bb79ed6ed2238b8e7323a61ebed4b581fc243</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2012</creationdate><topic>Applied sciences</topic><topic>Ballasting</topic><topic>cathodes</topic><topic>Current limiters</topic><topic>Doping</topic><topic>Electrical engineering. Electrical power engineering</topic><topic>electron supply control</topic><topic>Electronic ballasts</topic><topic>Electronic equipment and fabrication. Passive components, printed wiring boards, connectics</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Fabrication</topic><topic>FETs</topic><topic>Logic gates</topic><topic>Power electronics, power supplies</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Si field-emission arrays</topic><topic>Silicon</topic><topic>Transistors</topic><topic>Vacuum microelectronics</topic><topic>vertical ungated Si field-effect transistors (FETs)</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Guerrera, Stephen A.</creatorcontrib><creatorcontrib>Velasquez-Garcia, Luis Fernando</creatorcontrib><creatorcontrib>Akinwande, Akintunde Ibitayo</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Guerrera, Stephen A.</au><au>Velasquez-Garcia, Luis Fernando</au><au>Akinwande, Akintunde Ibitayo</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2012-09-01</date><risdate>2012</risdate><volume>59</volume><issue>9</issue><spage>2524</spage><epage>2530</epage><pages>2524-2530</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100-nm-diameter and 10- \mu\hbox{m} -tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 \mu\hbox{A/cm}^{2} were obtained from 1.36 million emitter arrays with 5- \mu\hbox{m} pitch.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2012.2204262</doi><tpages>7</tpages></addata></record> |
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| ispartof | IEEE transactions on electron devices, 2012-09, Vol.59 (9), p.2524-2530 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Ballasting cathodes Current limiters Doping Electrical engineering. Electrical power engineering electron supply control Electronic ballasts Electronic equipment and fabrication. Passive components, printed wiring boards, connectics Electronics Exact sciences and technology Fabrication FETs Logic gates Power electronics, power supplies Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Si field-emission arrays Silicon Transistors Vacuum microelectronics vertical ungated Si field-effect transistors (FETs) |
| title | Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T21%3A28%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-pascalfrancis_RIE&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Scaling%20of%20High-Aspect-Ratio%20Current%20Limiters%20for%20the%20Individual%20Ballasting%20of%20Large%20Arrays%20of%20Field%20Emitters&rft.jtitle=IEEE%20transactions%20on%20electron%20devices&rft.au=Guerrera,%20Stephen%20A.&rft.date=2012-09-01&rft.volume=59&rft.issue=9&rft.spage=2524&rft.epage=2530&rft.pages=2524-2530&rft.issn=0018-9383&rft.eissn=1557-9646&rft.coden=IETDAI&rft_id=info:doi/10.1109/TED.2012.2204262&rft_dat=%3Cpascalfrancis_RIE%3E26323964%3C/pascalfrancis_RIE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=6261534&rfr_iscdi=true |