Scaling of High-Aspect-Ratio Current Limiters for the Individual Ballasting of Large Arrays of Field Emitters

We report the fabrication and characterization of high-aspect-ratio silicon pillar current limiters [vertical ungated field-effect transistors (FETs)] for ballasting individual field emitters within field-emitter arrays (FEAs). Dense (1- \mu\hbox{m} pitch) FEAs that are individually ballasted by 100-nm-diameter and 10- \mu\hbox{m} -tall current limiters were fabricated, resulting in an emitter tip radius under 10 nm. When characterized without field emitters, the vertical current limiters (ungated FETs) show current-source-like behavior, with saturation currents up to 15 pA/FET. When the current limiters are incorporated into large arrays of field emitters, the current-voltage characteristics of the FEA show evidence of current limitation at high extraction gate voltages. Emission current densities of over 200 \mu\hbox{A/cm}^{2} were obtained from 1.36 million emitter arrays with 5- \mu\hbox{m} pitch.