1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range

This brief describes a low power quarter-rate single-loop clock and data recovery circuit (CDR) without a reference clock. A new frequency acquisition method is proposed, featuring unlimited frequency capture range and a short locking time. The proposed CDR has been designed and fabricated in a 28nm...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2024-09, Vol.71 (9), p.4061-4065
Hauptverfasser: Kim, Jin-Ho, Kim, Tae Ho, Lee, Hyung-Wook, Park, Jeong-Mi, Kang, Jin-Ku
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This brief describes a low power quarter-rate single-loop clock and data recovery circuit (CDR) without a reference clock. A new frequency acquisition method is proposed, featuring unlimited frequency capture range and a short locking time. The proposed CDR has been designed and fabricated in a 28nm CMOS process, and measurement results show a capture range of 1.4Gb/s to 8Gb/s over the full voltage-controlled oscillator (VCO) operating range, with a locking time of approximately 1.37{\mu s} . The power efficiency is 0.71 [pJ/bit] at 8Gb/s input data.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2024.3378302