A Modular Multiplier Implemented With Truncated Multiplication
In this brief, we propose a modular multiplication algorithm with four truncated multiplications to reduce the critical path. According to our algorithm, a high-speed 3-stage modular multiplier is constructed. Moreover, synthesized with TSMC 90 nm, our design can perform a 256-bit modular multiplica...
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Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2018-11, Vol.65 (11), p.1713-1717 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In this brief, we propose a modular multiplication algorithm with four truncated multiplications to reduce the critical path. According to our algorithm, a high-speed 3-stage modular multiplier is constructed. Moreover, synthesized with TSMC 90 nm, our design can perform a 256-bit modular multiplication for every clock period of 3.58 ns with circuit scale of approximately 629K equivalent gates. Further, by utilizing the modular multiplier, an elliptic curves cryptography processor is constructed, and it can perform a scalar multiplication in 19.4 \mu \text{s} , which is one of the fastest to date in published literatures. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2017.2771239 |