An Efficient Linearization Scheme for a Digital Polar EDGE Transmitter
A new linearization scheme is proposed, which compensates for nonlinear distortions experienced in the amplitude-modulation path of a digital polar EDGE transmitter integrated in a 65-nm CMOS transceiver system-on-chip (SoC) based on the Digital RF Processor (DRP) technology. The measured amplitude...
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Veröffentlicht in: | IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2010-03, Vol.57 (3), p.193-197 |
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Sprache: | eng |
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Zusammenfassung: | A new linearization scheme is proposed, which compensates for nonlinear distortions experienced in the amplitude-modulation path of a digital polar EDGE transmitter integrated in a 65-nm CMOS transceiver system-on-chip (SoC) based on the Digital RF Processor (DRP) technology. The measured amplitude and phase distortions are stored in lookup tables and used for predistortion without requiring inversion computations, thus achieving significant complexity reduction. Adaptive linear interpolation along with adaptive resolution enhancement provides the desired performance across power levels. With the presented scheme, the transmitter's measured performance significantly exceeds the EDGE specifications with an error vector magnitude (EVM) of typically 3% and a close-in modulated spectrum of -64 dB at a 400-kHz offset from the carrier frequency. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2010.2041811 |