Analysis of Errors in a Comparator-Based Switched-Capacitor Biquad Filter

Comparator-based switched-capacitor (CBSC) techniques have become popular in reducing power consumption and increasing the speed of data converters. This brief investigates the use of CBSC techniques for implementing a biquad filter. A CBSC implementation of a low-pass biquad is proposed, and the sources of error are analyzed. It is shown that implementing the lossy integrator as the last stage produces a lower offset voltage. The sensitivity of the biquad omega 0 and Q to the CBSC overshoot error is shown to be similar to that of the finite operational amplifier gain error in a switched-capacitor filter. Simulation results confirm the presented theory.