Don't-Care-Based Logic Optimization for Threshold Logic

In this paper, we present a don't-care-based threshold logic gate (TLG) minimization method for threshold logic network (TLN) optimization. We first introduce a sufficient condition for the don't cares of a TLG to exist in a TLN and propose a logic-implication-based method to identify the...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems 2023-09, Vol.42 (9), p.1-1
Hauptverfasser: Chen, Yung-Chih, Zheng, Li-Cheng, Chang, Hao-Ju
Format: Artikel
Sprache:eng
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Zusammenfassung:In this paper, we present a don't-care-based threshold logic gate (TLG) minimization method for threshold logic network (TLN) optimization. We first introduce a sufficient condition for the don't cares of a TLG to exist in a TLN and propose a logic-implication-based method to identify the don't cares. Then, we present two different methods for minimizing the TLG with the don't cares. The first one is an integer linear programming (ILP)-based method. We model the minimization problem as an ILP problem, and propose an approach to compute the necessary constraints of the ILP formulation. The second one is a heuristic method adapted from a threshold function identification approach. In the experiments, we applied the proposed methods to two sets of TLNs generated by the up-to-date synthesis technique. The results show that, for the two sets of TLNs, the ILP-based method achieves an average of 12% and 23% area reduction without any overhead on the TLG count and logic depth. Furthermore, the heuristic method is more efficient than the ILP-based method with only a little quality loss.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2023.3236560