LESS-MICS: A Low Energy Standby-Sparing Scheme for Mixed-Criticality Systems

Multicore platforms are becoming the dominant trend in mixed-criticality systems (MCSs). Multicores provide great opportunities to realize task-level redundancy for reliability enhancement. However, they may experience limited utility in battery-powered mixed-criticality embedded systems. Hence, joint energy and reliability management is a crucial issue in designing MCSs. In this article, we propose the low energy standby-sparing mechanism in mixed-criticality system (LESS-MICS) scheme, which uses the inherent redundancy of multicores to apply the standby-sparing technique for fault-tolerance. Also, by using the inherent redundancy, the LESS-MICS scheme proposes the Parallelism and Reduction policy that can be applied to any graph traverse algorithm to enhance the schedulability of graph-based mixed-criticality tasks, as well as joint energy and reliability management, and guarantying an acceptable service level for low-criticality tasks in overrun mode. To achieve further energy reduction, we minimize energy through convex optimization, and also propose energy management heuristics which use dynamic voltage and frequency scaling and dynamic power management. We evaluated our scheme under various system configurations. Experiments show that our scheme provides, on average, 24.2% energy reduction compared to state-of-the-art techniques while preserving an acceptable QoS level.