Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology

Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology

The latchup behavior of a VLSI CMOS technology using hybrid Schottky-ohmic contact sources and drains and a high resistivity substrate has been extensively studied via two dimensional numerical simulation. The modeling allows quantitative explanation of the triggering and sustaining behavior of such...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems 1985-10, Vol.4 (4), p.561-574
Hauptverfasser: Sangiorgi, E.C., Pinto, M.R., Swirhun, S.E., Dutton, R.W.
Format: Artikel
Sprache:eng
Schlagworte:
Bipolar transistors
CMOS technology
Conductivity
Current density
Electrons
Numerical analysis
Radiative recombination
Schottky barriers
Surface resistance
Very large scale integration
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Zusammenfassung:The latchup behavior of a VLSI CMOS technology using hybrid Schottky-ohmic contact sources and drains and a high resistivity substrate has been extensively studied via two dimensional numerical simulation. The modeling allows quantitative explanation of the triggering and sustaining behavior of such structures, as well as an accurate characterization of the influence of the various process and geometrical parameters on the resistance to latchup. The technology is compared to a corresponding low resistivity substrate (epi) CMOS technology.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.1985.1270158